The present invention is directed to an amplifier output stage.
In particular, the present invention is concerned with a low-impedance output stage for an amplifier that can be operated with low supply voltages and enables a voltage amplification greater than one.
Typically, what are referred to as class AB push-pull output stages are employed for driving high capacitative and resistive loads given high supply voltages. Such a class AB push-pull output stage has the typical circuit structure shown in FIG. 1 with five transistors T1 through T5 and a current source IO. The output stage shown in FIG. 1 maximally reaches an output level that extends up to the sum of a base-emitter voltage and a collector-emitter saturation voltage at the positive or, respectively, negative supply voltage VDD, VSS. The typical operative range of such class AB push-pull output stages for supply voltages above five volts derives therefrom. The output stage according to FIG. 1 is completely unsuitable for supply voltages of approximately 2 volts and below, since the possible output level control or modulation only amounts to a maximum of 100 through 200 mV proceeding from the center potential.
Given low supply voltages of approximately 2 V, circuit principles are therefore utilized as shown in FIG. 2. A differential amplifier DIFF generates drive voltages for two bipolar transistors T6, T7 of the output side that are operated in emitter circuitry. The output is fedback onto the inverting input of the differential amplifier DIFF via two resistors R2, R1.
A corresponding circuit structure can also be implemented with MOS transistors of the output side.
The output voltage of this output stage shown in FIG. 2 reaches the supply level VDD, VSS except for an emitter-collector saturation voltage, so that the output voltage is higher by a base-emitter voltage than the output voltage of the output stage shown in FIG. 1.
Since the collectors of the output transistors T6, T7 form the output of this stage, the stage is high-impedance. Given voltage changes at the output, for example due to external causes, this means that only a minimum current change ensues due to the output transistors T6, T7. The output transistors T6, T7 can thus not compensate voltage changes caused by external causes by themselves, as the transistors T4 and T5 in FIG. 1 can on the basis of the emitter negative feedback. The current through the output transistors can only change due to the feedback of the output voltages via the resistors R2, R1 onto the inverting input of the differential amplifier DIFF. Given a voltage change at the inverting input of the differential amplifier due to a voltage change at the output, the drive voltage for the output transistors and, thus, the current through the output therefore change. The level of the reaction of the differential amplifier to an undesired change of the output voltage is dependent on the divisor factor TL that is defined by the values of resistance of the negative feedback resistors R1, R2. The following is valid: TL=R1/(R1+R2)). The level of the reaction is also dependent on the gain of the differential amplifier. The reaction to the changes of the output voltage is all the greater and the output stage is all the lower in impedance the greater the gain and the greater the divisor factor TL.
Due to the frequency-dependency of the gain of the differential amplifier DIFF (decrease of the gain toward high frequencies), the output impedance of the circuit shown in FIG. 2 increases with increasing frequencies. The bandwidth of this known output stage is limited due to the phase shift of the differential amplifier DIFF that drives the output stage transistors T6, T7, this phase shift increasing at high frequencies.